《基于Proteus的数字电路分析与设计》PDF下载

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  • 作  者:朱清慧,李定珍主编
  • 出 版 社:西安:西安电子科技大学出版社
  • 出版年份:2016
  • ISBN:7560642116
  • 页数:300 页
图书介绍:

第1章 数字系统的概念(Concept of Digital System) 1

1.0 概述(Introduction) 1

1.1 数字量和模拟量(Digital Quantity and Analog Quantity) 1

1.1.1 模拟量和模拟电信号(Analog Quantity and Analog Signal) 1

1.1.2 数字量和数字电信号(Digital Quantity and Digital Signal) 2

1.2 二进制数、逻辑电平和数字波形(Binary Numbers, Logic Levels and Digital Waveforms) 2

1.2.1 二进制数(Binary Numbers) 2

1.2.2 逻辑电平(Logic Levels) 2

1.2.3 数字波形(Digital Waveforms) 3

1.3 数据传输(Data Transmission) 4

1.4 基本逻辑运算(Basic Logic Operation) 5

1.5 基本逻辑功能(Basic Logic Function) 8

1.5.1 比较功能(Comparison Function) 8

1.5.2 算术功能(Arithmetic Function) 8

1.6 数字集成电路(Digital Integrated Circuit) 12

1.6.1 集成芯片封装(IC Package) 12

1.6.2 管脚序号(Pin Numbering) 13

1.6.3 集成电路分类(Integrated Circuit Classification) 13

1.6.4 集成电路技术(Integrated Circuit Technology) 14

第2章 数制与码制(The Numeration System and Code System) 15

2.0 概述(Introduction) 15

2.1 十进制数(Decimal Numbers) 15

2.2 二进制数(Binary Numbers) 16

2.2.1 二进制的表示方式(Binary Representations) 16

2.2.2 二进制的优点(Advantages of Binary) 16

2.2.3 二进制的波形图(Binary Waveform) 17

2.3 十进制-二进制转换(Decimal to Binary Conversion) 17

2.3.1 整数部分(Integral Part) 17

2.3.2 小数部分(Decimal Part) 18

2.4 十进制算术运算(Binary Arithmetic Operation) 19

2.4.1 二进制加法(Binary Addition) 19

2.4.2 二进制减法(Binary Subtraction) 20

2.4.3 二进制乘法和除法(Binary Multiplication and Division) 20

2.5 二进制数的反码和补码(One’s Complement and Two’s Complement of Binary Numbers) 21

2.5.1 有符号数(Signed Numbers) 21

2.5.2 反码和补码(One’s Complement and Two’s Complement) 21

2.5.3 补码的运算(Operation of Two’s Complement) 23

2.5.4 溢出(Overflow) 24

2.6 八进制数(Octal Numbers) 24

2.6.1 八进制数的表示方法(Representation of Octal Numbers) 24

2.6.2 八进制数与二进制数、十进制数之间的转换(Conversion of Octal Numbers into Binary Numbers&Conversion of Octal Numbers into Decimal Numbers) 25

2.7 十六进制数(Hexadecimal Numbers) 25

2.7.1 十六进制数的表示方法(Representation of Hexadecimal Numbers) 25

2.7.2 十六进制数与二进制数、十进制数之间的转换(Conversion of Hexadecimal Numbers into Binary Numbers&Conversion of Hexadecimal Numbers into Decimal Numbers) 26

2.8 BCD码(Binary-Coded Decimal) 26

2.9 格雷码和ASCII码(Gray Code and ASCII Code) 28

2.9.1 格雷码(Gray Code) 28

2.9.2 ASCII码(ASCII Code) 29

习题(Exercises) 30

第3章 门电路(Gate Circuit) 32

3.0 概述(Introduction) 32

3.1 三极管的基本开关电路(Basic Switching Circuit of Triode) 32

3.1.1 双极型三极管的基本开关电路(Basic Switching Circuit of BJT) 32

3.1.2 MOSFET基本开关电路(MOSFET Basic Switching Circuit) 34

3.1.3 TTL和CMOS的逻辑电平标准(Standard of TTL & CMOS Logic Levels) 35

3.2 TTL 门电路的工作原理(Working Principle of TTL Gate Circuit) 35

3.2.1 TTL反相器(TTL Inverter) 35

3.2.2 TTL与非门(TTL AND-NOT Gate) 37

3.2.3 其它TTL门电路(Other TTL Gate Circuits) 39

3.3 CMOS门电路(CMOS Gate Circuit) 41

3.3.1 CMOS基本逻辑门电路(CMOS Basic Logic Gate Circuit) 41

3.3.2 带缓冲器的CMOS门电路(CMOS Gate Circuit with Buffer) 43

3.4 其它功能门电路(Gate Circuits of Other Functions) 44

3.4.1 CMOS传输门(CMOS Transmission Gate) 44

3.4.2 三态门(Three-state Gate) 45

3.4.3 集电极开路门(Open Collector Gate) 46

3.5 数字集成芯片实用常识(Practical Common Sense of Digital Integrated Chip) 48

3.5.1 数字集成芯片分类及命名(Classification and Nomenclature of DigitalIntegrated Chip) 48

3.5.2 数字集成芯片管脚的处理(Processing of Digital Integrated Chip Pin) 49

习题(Exercises) 50

第4章 组合逻辑代数(Combined Logic Algebra) 54

4.0 概述(Introduction) 54

4.1 布尔运算的定律和法则(Laws and Rules of Boolean Operation) 54

4.1.1 基本公式(Basic Formulas) 54

4.1.2 常用公式(Common Formulas) 56

4.1.3 逻辑代数的基本定理(Fundamental Theorem of Logical Algebra) 57

4.2 逻辑函数及其表示方法(Logic Function & It’s Representation) 58

4.2.1 逻辑函数(Logic Function) 58

4.2.2 逻辑函数的表示方法(Representation of Logic Function) 59

4.2.3 逻辑函数形式的转换(Conversion of Logic Function Forms) 60

4.2.4 标准与或式和标准或与式(Standard AND-OR Form & StandardOR-AND Form) 63

4.2.5 逻辑函数形式的变换(Variation of Logic Function Forms) 67

4.3 逻辑函数的化简方法(Approaches of Logic Function Simplification) 67

4.3.1 公式法化简(Simplifying Logic Algebra through Laws and Rules) 67

4.3.2 卡诺图法化简(Simplifying Logic Algebra through Karnaugh Maps) 70

4.4 具有约束的逻辑函数的化简(Simplification of Logic Function with Constraint) 77

4.4.1 约束项和约束条件(Constraint Term and Constraint Condition) 77

4.4.2 具有约束的逻辑函数的公式法化简(Simplification of Logic Function withConstraints through Laws and Rules) 78

4.4.3 具有约束的逻辑函数的卡诺图法化简(Simplification of Logic Function withConstraints through Karnaugh Maps) 79

习题(Exercises) 80

第5章 组合逻辑电路分析与设计(Analysis and Design of Combinational Logic Circuit) 86

5.0 概述(Introduction) 86

5.1 组合逻辑电路的分析和设计方法(Analysis and Design Method of Combinational Logic Circuit) 86

5.1.1 组合逻辑电路的分析方法(Analysis Method of Combinational Logic Circuit) 87

5.1.2 组合逻辑电路的设计方法(Design Method of Combinational Logic Circuit) 89

5.2 常用组合逻辑集成芯片(Common Combinational Logic Integrated Chip) 93

5.2.1 编码器(Encoder) 93

5.2.2 译码器(Decoder) 102

5.2.3 数据分配器(Demultiplexer) 116

5.2.4 数据选择器(Multiplexer) 118

5.2.5 加法器(Adder) 128

5.2.6 全减器(Full Subtractor) 135

5.2.7 数据比较器(Data Comparator) 136

5.3 组合逻辑电路中的竞争和冒险(Competition and Adventure in CombinationalLogical Circuit) 140

5.3.1 产生竞争和冒险的原因(Causes of Competition and Adventure) 140

5.3.2 消除竞争和冒险的方法(Methods of Clearing Competition and Adventure) 142

5.4 总结(Summary) 143

习题(Exercises) 144

第6章 锁存器和触发器(Latchs and Flip-Flops) 149

6.0 概述(Introduction) 149

6.1 SR锁存器(SR Latch) 149

6.1.1 低电平输入有效的SR锁存器(SR Latch with Low Active Input Level) 150

6.1.2 高电平输入有效的SR锁存器(SR Latch with High Active Input Level) 152

6.1.3 SR锁存器的应用(Application of SR Latch) 153

6.2 触发器(Flip-Flops) 154

6.2.1 电平触发的触发器(Level Triggered Flip-Flops) 154

6.2.2 脉冲触发的触发器(Pulse Triggered Flip-Flops) 158

6.2.3 边沿触发的触发器(Edge Triggered Flip-Flops) 161

6.2.4 触发器功能汇总(Function Summary of Flip-Flops) 164

6.3 总结(Summary) 170

习题(Exercises) 170

第7章 时序逻辑电路的分析与设计(Analysis and Design of Sequential Logic Circuit) 174

7.0 概述(Introduction) 174

7.1 时序逻辑电路的分析方法(Analysis Methods of Sequential Logic Circuit) 176

7.1.1 同步时序逻辑电路的分析方法(Analysis Methods of Synchronous Sequential Logic Circuit) 176

7.1.2 异步时序逻辑电路的分析方法(Analysis Methods of Asynchronous Sequential Logic Circuit) 180

7.2 计数器(Counters) 182

7.2.1 异步计数器(Asynchronous Counter) 183

7.2.2 同步计数器(Synchronous Counter) 188

7.2.3 加/减计数器(Up/Down Counter) 199

7.2.4 任意进制计数器的集成芯片连接(Connection of Module-N Counter with Integrated Chip) 202

7.3 寄存器和移位寄存器(Register and Shift Register) 212

7.3.1 寄存器(Register) 212

7.3.2 移位寄存器(Shift Register) 214

7.4 环形计数器和扭环形计数器(Ring Counter and Twisted-Ring Counter) 221

7.4.1 环形计数器(Ring Counter) 221

7.4.2 扭环形计数器(Twisted-Ring Counter) 225

7.5 时序逻辑电路的设计方法(Design Methods of Sequential Logic Circuit) 227

7.5.1 顺序脉冲发生器的设计(Design of Sequence Pulse Generator) 227

7.5.2 序列信号发生器的设计(Design of Sequence Signal Generator) 231

7.5.3 同步时序逻辑电路的设计方法(Design Methods of Synchronous Sequential Logic Circuit) 233

7.5.4 异步时序逻辑电路的设计方法(Design Methods of Asynchronous Sequential Logic Circuit) 237

7.6 总结(Summary) 241

习题(Exercises) 242

第8章 脉冲波形发生器(Pulse Waveform Generator) 247

8.0 概述(Introduction) 247

8.1 施密特触发器(Schmitt Trigger) 247

8.1.1 门电路组成的施密特触发器(Schmitt Trigger with Gate Circuit) 248

8.1.2 CMOS集成施密特触发器(Integrated Schmitt Trigger with CMOS) 250

8.1.3 施密特触发器的应用(Application of Schmitt Trigger) 251

8.2 555定时器(555 Timer) 255

8.2.1 555定时器的工作原理(Working Principle of 555 Timer) 256

8.2.2 用555定时器构成的多谐振荡器(Multi-Vibrator with 555 Timer) 257

8.2.3 用555定时器构成的单稳态触发器(Mono-Stable Stable Trigger with 555 Timer) 259

8.2.4 用555定时器构成的施密特触发器(Schmitt Trigger with of 555 Timer) 262

8.3 集成单稳态触发器(Integrated Mono-Stable Trigger) 263

8.3.1 用CMOS门电路组成的微分型单稳态触发器(Differential Mono-Stable Trigger Composed of CMOS Gate Circuit) 264

8.3.2 集成单稳态触发器(Integrated Mono-Stable Multi-Vibrator) 266

习题(Exercises) 272

第9章 模-数和数-模转换器(Analog to Digital and Digital to Analog Converters) 276

9.0 概述(Introduction) 276

9.1 A/D转换器(Analog to Digital Convertors) 276

9.1.1 A/D转换器的基本原理(Basic Principle of A/D Converter) 276

9.1.2 A/D转换器精度与转换速度(Precision and Speed of A/D Converter) 281

9.2 A/D转换器的应用与仿真(Application and Simulation of A/D Converter) 282

9.2.1 八位单极性并行输出ADC0808(ADC0808 with Unipolar Voltage Input and Parallel Output of Eight Bits) 282

9.2.2 双通道串行输出ADC0832 (ADC0832 with Dual Channels Input and Serial Output) 284

9.2.3 双极性A/D转换器(A/D Converter with Bipolar Voltage Input) 286

9.3 D/A转换器(Digital to Analog Converter) 287

9.3.1 权电阻网络D/A转换器(D/A Converter with Weight Resistance Network) 288

9.3.2 倒T型电阻网络D/A转换器(D/A Converter with Inverted T Type Resistor Network) 289

9.3.3 权电流型D/ A转换器(D/A Converter with Power Current Mode) 290

9.3.4 D/A转换器的转换精度(Conversion Accuracy of D/A Converter) 292

9.4 D/A转换器的应用与仿真(Application and Simulation of D/A Converter) 292

9.4.1 DAC0832 292

9.4.2 DAC0808 294

习题(Exercises) 295

参考文献 300