PART ONE OVERVIEW 1
Chapter 1 Introduction 1
1.1 Organization and Architecture 2
1.2 Structure and Function 3
1.3 Why Study Computer Organization and Architecture？ 10
Chapter 2 Computer Evolution and Performance 11
2.1 A Brief History of Computers 12
2.2 Designing for Performance 33
2.3 Pentium and PowerPC Evolution 40
2.4 Recommended Reading 43
2.5 Key Terms，Review Questions，and Problems 44
PART TWO THE COMPUTER SYSTEM 48
Chapter 3 A Top-Level View of Computer Function and Interconnection 48
3.1 Computer Components 50
3.2 Computer Function 52
3.3 Interconnection Structures 66
3.4 Bus Interconnection 68
3.5 PCI 77
3.6 Recommended Reading 87
3.7 Key Terms，Review Questions，and Problems 87
Appendix 3A Timing Diagrams 91
Chapter 4 Cache Memory 93
4.1 Computer Memory System Overview 94
4.2 Cache Memory Principles 101
4.3 Elements of Cache Design 104
4.4 Pentium 4 and PowerPC Cache Organizations 120
4.5 Recommended Reading 124
4.6 Key Terms，Review Questions，and Problems 125
Appendix 4A Performance Characteristics of Two-Level Memories 128
Chapter 5 Internal Memory 136
5.1 Semiconductor Main Memory 137
5.2 Error Correction 146
5.3 Advanced DRAM Organization 151
5.4 Recommended Reading 156
5.5 Key Terms，Review Questions，and Problems 157
Chapter 6 External Memory 161
6.1 Magnetic Disk 162
6.2 RAID 171
6.3 Optical Memory 180
6.4 Magnetic Tape 186
6.5 Recommended Reading 188
6.6 Key Terms，Review Questions，and Problems 189
Chapter 7 Input/Output 192
7.1 External Devices 194
7.2 I/O Modules 198
7.3 Programmed I/O 201
7.4 Interrupt-Driven I/O 204
7.5 Direct Memory Access 213
7.6 I/O Channels and Processors 219
7.7 The External Interface：FireWire and InfiniBand 221
7.8 Recommended Reading 230
7.9 Key Terms，Review Questions，and Problems 230
Chapter 8 Operating System Support 233
8.1 Operating System Overview 234
8.2 Scheduling 245
8.3 Memory Management 252
8.4 PentiumⅡ and PowerPC Memory Management 263
8.5 Recommended Reading 271
8.6 Key Terms，Review Questions，and Problems 271
PART THREE THE CENTRAL PROCESSING UNIT 275
Chapter 9 Computer Arithmetic 275
9.1 The Arithmetic and Logic Unit 276
9.2 Integer Representation 277
9.3 Integer Arithmetic 282
9.4 Floating-Point Representation 298
9.5 Floating-Point Arithmetic 303
9.6 Recommended Reading 214
9.7 Key Terms，Review Questions，and Problems 215
Chapter 10 Instruction Sets：Characteristics and Functions 319
10.1 Machine Instruction Characteristics 321
10.2 Types of Operands 327
10.3 Pentium and PowerPC Data Types 329
10.4 Types of Operations 332
10.5 Pentium and PowerPC Operation Types 344
10.6 Assembly Language 354
10.7 Recommended Reading 356
10.8 Key Terms，Review Questions，and Problems 356
Appendix 10A Stacks 362
Appendix 10B Little-，Big-，and Bi-Endian 366
Chapter 11 Instruction Sets：Addressing Modes and Formats 371
11.1 Addressing 372
11.2 Pentium and PowerPC Addressing Modes 379
11.3 Instruction Formats 384
11.4 Pentium and PowerPC Instruction Formats 392
11.5 Recommended Reading 396
11.6 Key Terms，Review Questions，and Problems 396
Chapter 12 Processor Structure and Function 400
12.1 Processor Organization 401
12.2 Register Organization 403
12.3 Instruction Cycle 408
12.4 Instruction Pipelining 412
12.5 The Pentium Processor 426
12.6 The PowerPC Processor 434
12.7 Recommended Reading 440
12.8 Key Terms，Review Questions，and Problems 441
Chapter 13 Reduced Instruction Set Computers 445
13.1 Instruction Execution Characteristics 447
13.2 The Use of a Large Register File 452
13.3 Compiler-Based Register Optimization 457
13.4 Reduced Instruction Set Architecture 459
13.5 RISC Pipelining 465
13.6 MIPS R4000 468
13.7 SPARC 475
13.8 RISC versus CISC Controversy 480
13.9 Recommended Reading 481
13.10 Key Terms，Review Questions，and Problems 482
Chapter 14 Instruction-Level Parallelism and Superscalar Processors 485
14.1 Overview 487
14.2 Design Issues 491
14.3 Pentium 500
14.4 PowerPC 506
14.5 Recommended Reading 514
14.6 Key Terms，Review Questions，and Problems 515
Chapter 15 The IA-64 Architecture 520
15.1 Motivation 522
15.2 General Organization 523
15.3 Predication，Speculation，and Software Pipelining 525
15.4 IA-64 Instruction Set Architecture 541
15.5 Itanium Organization 547
15.6 Recommended Reading 550
15.7 Key Terms，Review Questions，and Problems 551
PART FOUR THE CONTROL UNIT 554
Chapter 16 Control Unit Operation 554
16.1 Micro-Operations 556
16.2 Control of the Processor 562
16.3 Hardwired Implementation 574
16.4 Recommended Reading 577
16.5 Key Terms，Review Questions，and Problems 577
Chapter 17 Microprogrammed Control 579
17.1 Basic Concepts 580
17.2 Microinstruction Sequencing 589
17.3 Microinstruction Execution 595
17.4 TI 8800 607
17.5 Recommended Reading 617
17.6 Key Terms，Review Questions，and Problems 618
PART FIVE PARALLEL ORGANIZATION 620
Chapter 18 Parallel Processing 620
18.1 Multiple Processor Organizations 622
18.2 Symmetric Multiprocessors 624
18.3 Cache Coherence and the MESI Protocol 632
18.4 Multithreading and Chip Multiprocessors 638
18.5 Clusters 645
18.6 Nonuniform Memory Access 651
18.7 Vector Computation 655
18.8 Recommended Reading 668
18.9 Key Terms，Review Questions，and Problems 669
Appendix A Number Systems 675
A.1 The Decimal System 676
A.2 The Binary System 676
A.3 Converting between Binary and Decimal 677
A.4 Hexadecimal Notation 679
A.5 Problems 681
Appendix B Digital Logic 682
B.1 Boolean Algebra 683
B.2 Gates 685
B.3 Combinational Circuits 687
B.4 Sequential Circuits 708
B.5 Recommended Reading 717
B.6 Problems 717
Appendix C Projects for Teaching Computer Organization and Architecture 720
C.1 Research Projects 721
C.2 Simulation Projects 721
C.3 Reading/Report Assignments 722
Glossary 723
References 733
Index 745