数字系统设计与VHDL 英文版PDF电子书下载

Chapter 1 Review of Logic Design Fundamentals 1

1.1 Combinational Logic 1

1.2 Boolean Algebra and Algebraic Simplification 3

1.3 Karnaugh Maps 7

1.4 Designing with NAND and NOR Gates 10

1.5 Hazards in Combinational Circuits 12

1.6 Flip-Flops and Latches 14

1.7 Mealy Sequential Circuit Design 17

1.8 Moore Sequential Circuit Design 25

1.9 Equivalent States and Reduction of State Tables 28

1.10 Sequential Circuit Timing 30

1.11 Tristate Logic and Busses 41

1.12 Problems 42

Chapter 2 Introduction to VHDL 51

2.1 Computer-Aided Design 51

2.2 Hardware Description Languages 54

2.3 VHDL Description of Combinational Circuits 57

2.4 VHDL Modules 61

2.5 Sequential Statements and VHDL Processes 67

2.6 Modeling Flip-Flops Using VHDL Processes 69

2.7 Processes Using Wait Statements 73

2.8 Two Types of VHDL Delays:Transport and Inertial Delays 75

2.9 Compilation,Simulation,and Synthesis of VHDL Code 77

2.10 VHDL Data Types and Operators 82

2.11 Simple Synthesis Examples 84

2.12 VHDL Models for Multiplexers 87

2.13 VHDL Libraries 90

2.14 Modeling Registers and Counters Using VHDL Processes 95

2.15 Behavioral and Structural VHDL 101

2.16 Variables,Signals,and Constants 111

2.17 Arrays 114

2.18 Loops in VHDL 117

2.19 Assert and Report Statements 119

2.20 Problems 122

Chapter 3 Additional Topics in VHDL 137

3.1 VHDL Functions 137

3.2 VHDL Procedures 141

3.3 Attributes 143

3.4 Creating Overloaded Operators 147

3.5 Multi-Valued Logic and Signal Resolution 148

3.6 The IEEE 9-Valued Logic System 153

3.7 SRAM Model Using IEEE 1164 156

3.8 Model for SRAM Read/Write System 158

3.9 Generics 161

3.10 Named Association 162

3.11 Generate Statements 163

3.12 Files and TEXTIO 165

3.13 Problems 169

Chapter 4 Design Examples 177

4.1 BCD to Seven-Segment Display Decoder 178

4.2 A BCD Adder 179

4.3 32-Bit Adders 181

4.4 Traffic Light Controller 188

4.5 State Graphs for Control Circuits 191

4.6 Scoreboard and Controller 192

4.7 Synchronization and Debouncing 195

4.8 A Add-and-Shift Multiplier 197

4.9 Array Multiplier 203

4.10 A Signed Integer/Fraction Muliplier 206

4.11 Keypad Scanner 218

4.12 Binary Dividers 226

4.13 Problems 236

Chapter 5 SM Charts and Microprogramming 247

5.1 State Machine Charts 247

5.2 Derivation of SM Charts 252

5.3 Realization of SM Charts 262

5.4 Implementation of the Dice Game 266

5.5 Problems 271

Chapter 6 Floating-Point Arithmetic 278

6.1 Representation of Floating-Point Numbers 278

6.2 Floating-Point Multiplication 284

6.3 Floating-Point Addition 294

6.4 Other Floating-Point Operations 300

6.5 Problems 301

Chapter 7 Hardware Testing and Design for Testability 306

7.1 Testing Combinational Logic 306

7.2 Testing Sequential Logic 311

7.3 Scan Testing 314

7.4 Boundary Scan 317

7.5 Built-In Self-Test 328

7.6 Problems 339

Chapter 8 Additional Design Examples 345

8.1 Design of a Wristwatch 345

8.2 Memory Timing Models 356

8.3 A Universal Asynchronous Receiver Transmitter 364

8.4 Problems 378

Appendix A VHDL Language Summary 383

Appendix B IEEE Standard Libraries 391

Appendix C TEXTIO Package 393

Appendix D Projects 395

References 406