PART Ⅰ OVERVIEW 1
CHAPTER 1 Introduction 3
1.1 Organization and Architecture 3
1.2 Structure and Function 4
1.3 Outline of the Book 9
CONTENTS 11
PREFACE 11
CHAPTER 2 Computer Evolution and Performance 15
2.1 A Brief History of Computers 15
2.2 Designing for Performance 36
2.3 Pentium and PowerPC Evolution 40
2.4 Recommended Reading 44
2.5 Problems 45
PART Ⅱ THE COMPUTER SYSTEM 47
3.1 Computer Components 49
CHAPTER 3 System Buses 49
3.2 Computer Function 52
3.3 Interconnection Structures 65
3.4 Bus Interconnection 65
3.5 PCI 75
3.6 Futurebus+ 84
3.7 Recommended Reading 94
3.8 Problems 94
APPENDIX 3A Timing Diagrams 97
CHAPTER 4 Internal Memory 100
4.1 Computer Memory System Overview 100
4.2 Semiconductor Main Memory 108
4.3 Cache Memory 121
4.4 Advanced DRAM Organization 140
4.5 Recommended Reading 146
4.6 Problems 147
Appendix 4A Performance Characteristics of Two-Level Memories 149
5.1 Magnetic Disk 155
CHAPTER 5 External Memory 155
5.2 RAID 161
5.3 Optical Memory 169
5.4 Magnetic Tape 174
5.5 Recommended Reading 175
5.6 Problems 175
CHAPTER 6 Input/Output 178
6.1 External Devices 178
6.2 I/O Modules 182
6.3 Programmed I/O 186
6.4 Interrupt-Driven I/O 190
6.5 Direct Memory Access 199
6.6 I/O Channels and Processors 202
6.7 The External Interface 204
6.8 Recommended Reading 218
6.9 Problems 219
7.1 Operating System Overview 222
CHAPTER 7 Operating System Support 222
7.2 Scheduling 234
7.3 Memory Management 240
7.4 Recommended Reading 262
7.5 Problems 263
PART Ⅲ THE CENTRAL PROCESSING UNIT 267
CHAPTER 8 Computer Arithmetic 269
8.1 The Arithmetic and Logic Unit(ALU) 269
8.2 Integer Representation 270
8.3 Integer Arithmetic 275
8.4 Floating-Point Representation 289
8.5 Floating-Point Arithmetic 295
8.6 Recommended Reading 304
8.7 Problems 305
APPENDIX 8A Number Systems 306
CHAPTER 9 Instruction Sets:Characteristics and Functions 313
9.1 Machine Instruction Characteristics 313
9.2 Types of Operands 320
9.3 Types of Operations 325
9.4 Assembly Language 344
9.5 Recommended Reading 346
9.6 Problems 346
APPENDIX 9A Stacks 351
APPENDIX 9B Little-,Big-,and Bi-Endian 356
CHAPTER 10 Instruction Sets:Addressing Modes and Formats 361
10.1 Addressing 361
10.2 Instruction Formats 374
10.3 Recommended Reading 386
10.4 Problems 386
CHAPTER 11 CPU Structure and Function 388
11.1 Processor Organization 388
11.2 Register Organization 389
11.3 The Instruction Cycle 396
11.4 Instruction Piplining 400
11.5 The Pentium Processor 412
11.6 The PowerPC Processor 418
11.7 Recommended Reading 425
11.8 Problems 425
CHAPTER 12 Reduced Instruction Set Computers(RISCs) 428
12.1 Instruction Execution Characteristics 429
12.2 The Use of a Large Register File 434
12.3 Compiler-Based Register Optimization 439
12.4 Reduced Instruction Set Architecture 440
12.5 RISC Pipelining 447
12.6 Motorola 88510 451
12.7 MIPS R4650 458
12.8 The RISC versus CISC Controversy 465
12.9 Recommended Reading 466
12.10 Problems 467
CHAPTER 13 Superscalar Processors 472
13.1 Overview 472
13.2 Design Issues 477
13.3 PowerPC 485
13.4 Pentium 492
13.5 Recommended Reading 497
13.6 Problems 498
PART Ⅳ THE CONTROL UNIT 501
CHAPTER 14 Control Unit Operation 503
14 1 Micro-operations 503
14.2 Control of the CPU 510
14.3 Hardwired Implementation 520
14 4 Recommended Reading 524
14.5 Problems 524
CHAPTER 15 Microprogrammed Control 526
15.1 Basic Concepts 526
15.2 Microinstruction Sequencing 535
15.3 Microinstruction Execution 541
15.4 TI 8800 551
15.5 Applications of Microprogramming 560
15.6 Recommended Reading 563
15.7 Problems 564
PART Ⅴ PARALLEL ORGANIZATION 567
CHAPTER 16 Parallel Processing 569
16.1 Multiprocessing 569
16.2 Cache Coherence and the MESI Protocol 578
16.3 Vector Computation 584
16.4 Parallel Processors 597
16.5 Recommended Reading 603
16.6 Problems 603
A.1 Boolean Algebra 606
APPENDIX Digital Logic 606
A.2 Gates 608
A.3 Combinational Circuits 610
A.4 Sequential Circuits 632
A.6 Problems 643
Glossary 646
References 655
Index 669